Yoonah Paik

e6d3ae42fb97bd334311ac25341d0d14 Yoonah Paik

E-mail: hmhmhey at gmail.com

Research Interests
Microarchitecture and Memory Systems /
DRAM Fault Cell Avoidance

 

Education

Korea University

  • BE in Electrical Engineering (Feb. 2015)
  • Ph.D candidate in Electrical and Computer Engineering
  • Member of Compiler and Microarchitecture Laboratory

 

Peer-Reviewed Conferences and International Journals

JaeYung Jun, Yoonah Paik, Gyeong Il Min, Seon Wook Kim and Youngsun Han, “Performance-Tolerant Hard Fault Avoidance Technique by Heap Memory Management“, Under Review

Hokyoon Lee, Yoonah Paik, Jaeyung Jun, Youngsun Han, Seon Wook Kim, “High-Throughput Low-Area Design of AES Using Constant Binary Matrix-Vector Multiplication“, Microprocessors and Microsystems, vol. 47, Part B, pp. 360-368, November 2016

 

International Conferences

Yoonah Paik, Miseon Han, Kyu Hyun Choi, Minseong Kim and Seon Wook Kim, “Cycle-Accurate Full System Simulation for CPU+GPU+HBM Computing Platform”, 2018 International Conference on Electronics, Information, and Communication, Hawaii, USA, 24-27 January, 2018

 

Domestic Journals and Conferences

백윤아, 전재영, 장기준, 최원하, 고한석, 김선욱, “GPU+HBM 컴퓨팅 플랫폼에서의 Last-Level Cache 유무에 따른 성능 분석”, 2018년도 대한전자공학회 하계학술대회

 

Domestic Patents

김선욱, 백윤아, 전재영, “주 메모리의 에러 셀 회피를 위한 스택 및 힙 메모리 관리 장치 및 그 방법”, Mar. 09. 2017, Registration Number: 1017168650000

 

International Patents

Seon Wook Kim, Yoonah Paik, Jae Yung Jun, “VIRTUAL MEMORY MANAGEMENT APPARATUS FOR AVOIDING ERROR CELL IN MAIN MEMORY AND METHOD THEREFOR”

 

Teaching Experience

  • Mar. 2016 – Aug. 2016: Teaching Assistant, Department of Computer Science and Engineering, Korea University, “Digital Logic Design”
  • Sep. 2016 – Feb. 2017: Teaching Assistant, School of Electrical Engineering, Korea University, “Digital System Design and Laboratory”
  • Mar. 2018 – Aug. 2018: Lecturer, Department of Computer Science and Engineering, Korea University, “Digital Logic Design”